Nvidia Cut Vera Rubin Bandwidth 13% and Told No One

What exactly changed on the Vera Rubin spec sheet?

The edits are small enough to miss on a spec table and big enough to matter at rack scale.

Nvidia's Vera Rubin NVL72 page now lists each Rubin GPU at 19.2 TB/s of HBM4 bandwidth, down from 22 TB/s, and 3 TB/s of NVLink 6 bandwidth, down from 3.6 TB/s. Memory capacity holds at 288 GB per GPU, and the headline 50 PFLOPS of sparse NVFP4 inference is unchanged.

The rack-level numbers tell a clearer story. Aggregate memory bandwidth drops from 1,580 TB/s to 1,400 TB/s, NVLink total falls from 260 TB/s to 216 TB/s, and the two-GPU Vera Rubin Superchip goes from 44 TB/s to 38.5 TB/s.

The eight-GPU HGX Rubin NVL8 is the worst case. It now lists 2 TB of HBM4 at 130 TB/s for the whole system, down from 2.3 TB and 176 TB/s—a 26% bandwidth cut. NVLink Switch bandwidth falls from 28.8 TB/s to 24 TB/s, and dense training figures slip from 280 to 270 PFLOPS of NVFP4 and from 140 to 130 PFLOPS of FP8. Scale-out networking is the only line that rises, by 12.5% in most configurations, and Nvidia hasn't said why.

Nvidia Vera Rubin: revised specs and what changed

How did the change go unnoticed for six weeks?

Nvidia didn't announce it. The company edited the product pages and moved on.

The revision surfaced in a report from IT Home, which compared Nvidia's October documentation with a copy saved in June 2026. Wccftech then narrowed the window using Wayback Machine snapshots, placing the edit between September 1 and September 11. As Hardware Busters put it, Nvidia went "the quiet way: by editing the product pages."

The timing is awkward. The change landed shortly after Nvidia's August second-quarter results said Vera Rubin racks were already running at partners including CoreWeave, Google Cloud and Microsoft Azure—months after early systems began reaching select customers, and just as the fall production shipments Nvidia promised in May 2026 were due to begin.

That suggests these figures describe hardware going out the door, not a distant goal. And they sat on Nvidia's site for at least six weeks before anyone reported them.

Why would Nvidia lower its own targets?

The HBM4 supply chain never quite hit the speeds Nvidia originally asked for.

JEDEC's HBM4 standard, published in April 2025, specifies up to 8 Gb/s per pin across a 2,048-bit interface—about 2 TB/s per stack. Nvidia wanted far more. According to a TechPowerUp report from March, Rubin's per-GPU target climbed from 13 TB/s at GTC 2025 to 20.5 TB/s by that September and 22 TB/s at CES 2026. A SemiAnalysis note relayed in that report said SK hynix and Samsung were struggling to reach the final figure, with early shipments expected nearer 20 TB/s.

TrendForce reported in September 2025 that Nvidia was pressing suppliers for 10 Gbps per pin, then said by January that the request had passed 11 Gbps and sent all three HBM makers back to redesign. An Nvidia spokesperson told Tom's Hardware that "our HBM4 memory partners remain on track for production shipments." SK hynix finished HBM4 development first, and Samsung began shipping in February at 11.7 Gbps, above Nvidia's stated requirement.

The revised sheet reads like the fallback scenario TrendForce warned about: a lower overall ceiling, plus a further-reduced HGX tier. Nvidia needs to deliver systems to customers more than it needs to chase an elusive bandwidth number.

Does AMD now lead on paper?

On the spec sheet, yes—but nobody has published benchmarks.

AMD's Instinct MI455X spreads 432 GB across 12 HBM4 stacks for 23.3 TB/s, which needs only about 7.6 Gbps per pin—below the JEDEC baseline. AMD bought its bandwidth with width rather than speed, so it never needed above-standard memory.

When it launched Helios in July 2026, AMD claimed 6% more HBM bandwidth than Vera Rubin NVL72's published figure. Against the revised 1,400 TB/s, Helios' 1.67 PB/s is roughly 19% ahead. Scale-up bandwidth, Nvidia's traditional stronghold, was level at 260 TB/s per rack and now favors AMD by about a fifth, while the scale-out increase trims AMD's claimed 50% lead there to about a third.

For buyers running inference, the bandwidth line matters more than the FLOPS line. Nvidia's engineers write in their July deep dive that decode is bound by the memory subsystem, though they argue what counts is how efficiently kernels use it—that it's "not about peak bandwidth specs." The marketing hasn't moved, however: the NVL72 page still promises up to 10x more tokens per megawatt and one-tenth the cost per million tokens versus GB200 NVL72.

Availability and pricing for US, UK and EU buyers

Vera Rubin systems are already running at CoreWeave, Google Cloud and Microsoft Azure, and Nvidia said in May 2026 that fall production shipments would begin this year. The revised figures apply to hardware now going out the door, not a future revision.

Nvidia has not published retail pricing for Vera Rubin racks, and cloud pricing for Rubin-based instances has not been announced. Buyers in the US, UK and EU should expect the usual pattern: first access through cloud partners, with on-prem HGX systems following through server vendors.

Nvidia will likely keep selling Vera Rubin racks as fast as it can build them—demand for AI compute hasn't softened. But the episode is a reminder that spec sheets are marketing documents until benchmarks arrive, and that the biggest number on the page is often the one that gets edited last.